Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something known as Moore’s Law. Moore’s Law states that an integrated circuit’s processing power will double every two years. This has been accomplished by making devices smaller and smaller. The question looming in everyone’s mind is “How far into the future can this continue?” Advanced CMOS/FinFET Fabrication is a 24 hour course that offers detailed instruction on the processing used in a modern integrated circuit, and the processing technologies required to make them. We place special emphasis on current issues related to manufacturing the next generation devices. This course is a must for every manager, engineer and technician working in the semiconductor industry, using semiconductor components or supplying tools to the industry.
By concentrating on the latest developments in CMOS and FinFET technology, participants will learn why FinFETs are fast becoming the technologies of choice at feature sizes below 20nm. Our instructors work hard to explain semiconductor processing without delving heavily into the complex physics and materials science that normally accompany this discipline.
Participants will learn basic, but powerful, aspects about CMOS fabrication and FinFET technology. This skill-building series is divided into four segments:
1. Front End Of Line (FEOL) Overview. Participants will study the major developments associated with FEOL processing, including Ion Implantation, Rapid Thermal Annealing (RTA) for implants and silicides, and Pulsed Plasma Doping. They will also study alternate substrate technologies like SOI, as well as High-k/Metal Gates for improved leakage control.
2. Back End Of Line (BEOL) Overview. Participants will study the major developments associated with BEOL processing, including copper metallization and Low-k Dielectrics. They will learn about why they’re necessary for improved performance.
3. FinFET Manufacturing Overview. Participants will learn how semiconductor manufacturers are currently processing FinFET devices and the difficulties associated with three-dimensional structures from a processing and metrology standpoint.
4. FinFET Reliability. Participants will study the failure mechanisms and techniques used for studying the reliability of these devices.
- This course will provide participants with an in-depth understanding of Bulk technology, SOI technology and the technical issues.
- Participants will understand how Hi-K/Metal Gate devices are manufactured.
- Participants will also understand how FinFET devices are manufactured.
- This course will provide a look into the latest challenges with copper metallization and Low-k dielectrics.
- Participants will understand the difficulties associated with non-planar structures and methods to alleviate the problems.
- Participants will be able to make decisions about how to evaluate FinFET devices and what changes are likely to emerge in the coming years.
- Participants will briefly learn about IC reliability and the failure modes associated with these devices.
- Participants will see a comparison between FinFETs and new alternatives (such as Gate All Around (GAA) structures and nanosheets).